M10.: Implementation and analysis of sequential networks
Place: Q BP110.
Required knowledge
- Digital design knowledge.
- Verilog knowledge!!!!
- Basic Xilin ISE knowledge (Exercise 3.)
- Xilinx ChipScope (Logic analyzers and Xilinx ChipScope documentation)
PLEASE PREPARE FROM THE VERILOG BASICS! You can find the necessary material at Measurement 3!
Course Materials
- Laboratory guide (protected file)
- Logic analyzers and Xilinx ChipScope (protected file)
- Verilog skeleton files (protected files)
Related web page
Submitted by Orosz György on 2011. October 27. 15:05 | Last updated: 2022. October 28. 13:10