Environment Settings | ||||
Environment Variable | xst | ngdbuild | map | par |
PATHEXT | .COM; .EXE; .BAT; .CMD; .VBS; .VBE; .JS; .JSE; .WSF; .WSH; .MSC |
.COM; .EXE; .BAT; .CMD; .VBS; .VBE; .JS; .JSE; .WSF; .WSH; .MSC |
.COM; .EXE; .BAT; .CMD; .VBS; .VBE; .JS; .JSE; .WSF; .WSH; .MSC |
.COM; .EXE; .BAT; .CMD; .VBS; .VBE; .JS; .JSE; .WSF; .WSH; .MSC |
Path | C:\Xilinx\ISE_DS\ISE\\lib\nt; C:\Xilinx\ISE_DS\ISE\\bin\nt; C:\Xilinx\ISE_DS\PlanAhead\bin; C:\Xilinx\ISE_DS\ISE\bin\nt; C:\Xilinx\ISE_DS\ISE\lib\nt; C:\Xilinx\ISE_DS\EDK\bin\nt; C:\Xilinx\ISE_DS\EDK\lib\nt; C:\Xilinx\ISE_DS\EDK\gnu\microblaze\nt\bin; C:\Xilinx\ISE_DS\EDK\gnu\powerpc-eabi\nt\bin; C:\Xilinx\ISE_DS\EDK\gnuwin\bin; C:\Xilinx\ISE_DS\common\bin\nt; C:\Xilinx\ISE_DS\common\lib\nt; C:\MentorGraphics\PADS\9.3.1PADS\SDD_HOME\common\win32\bin; C:\MentorGraphics\PADS\9.3.1PADS\SDD_HOME\common\win32\lib; C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v3.2\bin\; C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v4.0\bin\; C:\Program Files\NVIDIA Corporation\PhysX\Common; C:\Windows\system32; C:\Windows; C:\Windows\System32\Wbem; C:\Windows\System32\WindowsPowerShell\v1.0\; C:\Program Files\Microsoft SQL Server\100\Tools\Binn\; C:\Program Files\Microsoft SQL Server\100\DTS\Binn\; C:\Program Files\NVIDIA GPU Computing SDK 4.0\C\common\bin; C:\MATLAB\runtime\win32; C:\MATLAB\bin; C:\Program Files\IVI Foundation\IVI\bin; C:\Program Files\IVI Foundation\VISA\WinNT\Bin\; C:\Program Files\IVI Foundation\VISA\WinNT\Bin; C:/MentorGraphics/PADS/9.3.1PADS/MGC_HOME.ixn/bin; C:/MentorGraphics/PADS/9.3.1PADS/MGC_HOME.ixn/lib; C:\MentorGraphics\ModelSim\win32 |
C:\Xilinx\ISE_DS\ISE\\lib\nt; C:\Xilinx\ISE_DS\ISE\\bin\nt; C:\Xilinx\ISE_DS\PlanAhead\bin; C:\Xilinx\ISE_DS\ISE\bin\nt; C:\Xilinx\ISE_DS\ISE\lib\nt; C:\Xilinx\ISE_DS\EDK\bin\nt; C:\Xilinx\ISE_DS\EDK\lib\nt; C:\Xilinx\ISE_DS\EDK\gnu\microblaze\nt\bin; C:\Xilinx\ISE_DS\EDK\gnu\powerpc-eabi\nt\bin; C:\Xilinx\ISE_DS\EDK\gnuwin\bin; C:\Xilinx\ISE_DS\common\bin\nt; C:\Xilinx\ISE_DS\common\lib\nt; C:\MentorGraphics\PADS\9.3.1PADS\SDD_HOME\common\win32\bin; C:\MentorGraphics\PADS\9.3.1PADS\SDD_HOME\common\win32\lib; C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v3.2\bin\; C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v4.0\bin\; C:\Program Files\NVIDIA Corporation\PhysX\Common; C:\Windows\system32; C:\Windows; C:\Windows\System32\Wbem; C:\Windows\System32\WindowsPowerShell\v1.0\; C:\Program Files\Microsoft SQL Server\100\Tools\Binn\; C:\Program Files\Microsoft SQL Server\100\DTS\Binn\; C:\Program Files\NVIDIA GPU Computing SDK 4.0\C\common\bin; C:\MATLAB\runtime\win32; C:\MATLAB\bin; C:\Program Files\IVI Foundation\IVI\bin; C:\Program Files\IVI Foundation\VISA\WinNT\Bin\; C:\Program Files\IVI Foundation\VISA\WinNT\Bin; C:/MentorGraphics/PADS/9.3.1PADS/MGC_HOME.ixn/bin; C:/MentorGraphics/PADS/9.3.1PADS/MGC_HOME.ixn/lib; C:\MentorGraphics\ModelSim\win32 |
C:\Xilinx\ISE_DS\ISE\\lib\nt; C:\Xilinx\ISE_DS\ISE\\bin\nt; C:\Xilinx\ISE_DS\PlanAhead\bin; C:\Xilinx\ISE_DS\ISE\bin\nt; C:\Xilinx\ISE_DS\ISE\lib\nt; C:\Xilinx\ISE_DS\EDK\bin\nt; C:\Xilinx\ISE_DS\EDK\lib\nt; C:\Xilinx\ISE_DS\EDK\gnu\microblaze\nt\bin; C:\Xilinx\ISE_DS\EDK\gnu\powerpc-eabi\nt\bin; C:\Xilinx\ISE_DS\EDK\gnuwin\bin; C:\Xilinx\ISE_DS\common\bin\nt; C:\Xilinx\ISE_DS\common\lib\nt; C:\MentorGraphics\PADS\9.3.1PADS\SDD_HOME\common\win32\bin; C:\MentorGraphics\PADS\9.3.1PADS\SDD_HOME\common\win32\lib; C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v3.2\bin\; C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v4.0\bin\; C:\Program Files\NVIDIA Corporation\PhysX\Common; C:\Windows\system32; C:\Windows; C:\Windows\System32\Wbem; C:\Windows\System32\WindowsPowerShell\v1.0\; C:\Program Files\Microsoft SQL Server\100\Tools\Binn\; C:\Program Files\Microsoft SQL Server\100\DTS\Binn\; C:\Program Files\NVIDIA GPU Computing SDK 4.0\C\common\bin; C:\MATLAB\runtime\win32; C:\MATLAB\bin; C:\Program Files\IVI Foundation\IVI\bin; C:\Program Files\IVI Foundation\VISA\WinNT\Bin\; C:\Program Files\IVI Foundation\VISA\WinNT\Bin; C:/MentorGraphics/PADS/9.3.1PADS/MGC_HOME.ixn/bin; C:/MentorGraphics/PADS/9.3.1PADS/MGC_HOME.ixn/lib; C:\MentorGraphics\ModelSim\win32 |
C:\Xilinx\ISE_DS\ISE\\lib\nt; C:\Xilinx\ISE_DS\ISE\\bin\nt; C:\Xilinx\ISE_DS\PlanAhead\bin; C:\Xilinx\ISE_DS\ISE\bin\nt; C:\Xilinx\ISE_DS\ISE\lib\nt; C:\Xilinx\ISE_DS\EDK\bin\nt; C:\Xilinx\ISE_DS\EDK\lib\nt; C:\Xilinx\ISE_DS\EDK\gnu\microblaze\nt\bin; C:\Xilinx\ISE_DS\EDK\gnu\powerpc-eabi\nt\bin; C:\Xilinx\ISE_DS\EDK\gnuwin\bin; C:\Xilinx\ISE_DS\common\bin\nt; C:\Xilinx\ISE_DS\common\lib\nt; C:\MentorGraphics\PADS\9.3.1PADS\SDD_HOME\common\win32\bin; C:\MentorGraphics\PADS\9.3.1PADS\SDD_HOME\common\win32\lib; C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v3.2\bin\; C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v4.0\bin\; C:\Program Files\NVIDIA Corporation\PhysX\Common; C:\Windows\system32; C:\Windows; C:\Windows\System32\Wbem; C:\Windows\System32\WindowsPowerShell\v1.0\; C:\Program Files\Microsoft SQL Server\100\Tools\Binn\; C:\Program Files\Microsoft SQL Server\100\DTS\Binn\; C:\Program Files\NVIDIA GPU Computing SDK 4.0\C\common\bin; C:\MATLAB\runtime\win32; C:\MATLAB\bin; C:\Program Files\IVI Foundation\IVI\bin; C:\Program Files\IVI Foundation\VISA\WinNT\Bin\; C:\Program Files\IVI Foundation\VISA\WinNT\Bin; C:/MentorGraphics/PADS/9.3.1PADS/MGC_HOME.ixn/bin; C:/MentorGraphics/PADS/9.3.1PADS/MGC_HOME.ixn/lib; C:\MentorGraphics\ModelSim\win32 |
XILINX | C:\Xilinx\ISE_DS\ISE\ | C:\Xilinx\ISE_DS\ISE\ | C:\Xilinx\ISE_DS\ISE\ | C:\Xilinx\ISE_DS\ISE\ |
XILINXD_LICENSE_FILE | 2100@fbpc36.mit.bme.hu | 2100@fbpc36.mit.bme.hu | 2100@fbpc36.mit.bme.hu | 2100@fbpc36.mit.bme.hu |
XILINX_DSP | C:\Xilinx\ISE_DS\ISE | C:\Xilinx\ISE_DS\ISE | C:\Xilinx\ISE_DS\ISE | C:\Xilinx\ISE_DS\ISE |
XILINX_EDK | C:\Xilinx\ISE_DS\EDK | C:\Xilinx\ISE_DS\EDK | C:\Xilinx\ISE_DS\EDK | C:\Xilinx\ISE_DS\EDK |
XILINX_PLANAHEAD | C:\Xilinx\ISE_DS\PlanAhead | C:\Xilinx\ISE_DS\PlanAhead | C:\Xilinx\ISE_DS\PlanAhead | C:\Xilinx\ISE_DS\PlanAhead |
Synthesis Property Settings | |||
Switch Name | Property Name | Value | Default Value |
-ifn | top_level.prj | ||
-ifmt | mixed | MIXED | |
-ofn | top_level | ||
-ofmt | NGC | NGC | |
-p | xc3s250e-5-tq144 | ||
-top | top_level | ||
-opt_mode | Optimization Goal | Speed | SPEED |
-opt_level | Optimization Effort | 1 | 1 |
-iuc | Use synthesis Constraints File | NO | NO |
-keep_hierarchy | Keep Hierarchy | No | NO |
-netlist_hierarchy | Netlist Hierarchy | As_Optimized | as_optimized |
-rtlview | Generate RTL Schematic | Yes | NO |
-glob_opt | Global Optimization Goal | AllClockNets | ALLCLOCKNETS |
-read_cores | Read Cores | YES | YES |
-write_timing_constraints | Write Timing Constraints | NO | NO |
-cross_clock_analysis | Cross Clock Analysis | NO | NO |
-bus_delimiter | Bus Delimiter | <> | <> |
-slice_utilization_ratio | Slice Utilization Ratio | 100 | 100% |
-bram_utilization_ratio | BRAM Utilization Ratio | 100 | 100% |
-verilog2001 | Verilog 2001 | YES | YES |
-fsm_extract | YES | YES | |
-fsm_encoding | Auto | AUTO | |
-safe_implementation | No | NO | |
-fsm_style | LUT | LUT | |
-ram_extract | Yes | YES | |
-ram_style | Auto | AUTO | |
-rom_extract | Yes | YES | |
-shreg_extract | YES | YES | |
-rom_style | Auto | AUTO | |
-auto_bram_packing | NO | NO | |
-resource_sharing | YES | YES | |
-async_to_sync | NO | NO | |
-mult_style | Auto | AUTO | |
-iobuf | YES | YES | |
-max_fanout | 500 | 500 | |
-bufg | 24 | 24 | |
-register_duplication | YES | YES | |
-register_balancing | No | NO | |
-optimize_primitives | NO | NO | |
-use_clock_enable | Yes | YES | |
-use_sync_set | Yes | YES | |
-use_sync_reset | Yes | YES | |
-iob | Auto | AUTO | |
-equivalent_register_removal | YES | YES | |
-slice_utilization_ratio_maxmargin | 5 | 0% |
Translation Property Settings | |||
Switch Name | Property Name | Value | Default Value |
-intstyle | ise | None | |
-dd | _ngo | None | |
-p | xc3s250e-tq144-5 | None | |
-uc | E:/Janos/Codec/FIlterCompilerISE/HDL/constr.ucf | None |
Map Property Settings | |||
Switch Name | Property Name | Value | Default Value |
-ir | Use RLOC Constraints | OFF | OFF |
-cm | Optimization Strategy (Cover Mode) | area | area |
-intstyle | ise | None | |
-o | top_level_map.ncd | None | |
-pr | Pack I/O Registers/Latches into IOBs | off | off |
-p | xc3s250e-tq144-5 | None |
Place and Route Property Settings | |||
Switch Name | Property Name | Value | Default Value |
-t | 1 | 1 | |
-intstyle | ise | ||
-ol | Place & Route Effort Level (Overall) | high | std |
-w | true | false |
Operating System Information | ||||
Operating System Information | xst | ngdbuild | map | par |
CPU Architecture/Speed | Intel(R) Core(TM)2 CPU 4400 @ 2.00GHz/1998 MHz | Intel(R) Core(TM)2 CPU 4400 @ 2.00GHz/1998 MHz | Intel(R) Core(TM)2 CPU 4400 @ 2.00GHz/1998 MHz | Intel(R) Core(TM)2 CPU 4400 @ 2.00GHz/1998 MHz |
Host | fpga01 | fpga01 | fpga01 | fpga01 |
OS Name | Microsoft Windows 7 , 32-bit | Microsoft Windows 7 , 32-bit | Microsoft Windows 7 , 32-bit | Microsoft Windows 7 , 32-bit |
OS Release | Service Pack 1 (build 7601) | Service Pack 1 (build 7601) | Service Pack 1 (build 7601) | Service Pack 1 (build 7601) |