Publications of András Pataricza

Books:

1
J. Hlavicka, E. Maehle, and A. Pataricza, editors.

Dependable Computing - EDCC-3, Proceedings of the Third European Conference on Dependable Computing.
Number 1667 in Lecture Notes in Computer Science. Springer, 1999.
2
A. Pataricza, E. Selényi, and A. Somogyi, editors.

Proceedings of mP'p4, the Ninth Symposium on Microprocessor and MIcrocomputer Apllications.
HTE, 1994.
 
 


In collection:

1
M. Dal Cin, A. Grygier, H. Hessenauer, U. Hildebrandt, J. Hönig, W. Hohl, E. Michel, and A. Pataricza.

Fault tolerance in distributed shared memory multiprocessors.
In A. Bode and M. Dal Cin, editors, Parallel Computer Architectures. Theory, Hardware, Software, Applications, LNCS 732, pages 31-48. Springer, Berlin etc, 1993.
 
 


Articles in periodicals:

1
G. Csertán, A. Pataricza, and E. Selényi.

Design for testability with HW-SW co-design.
Periodica Polytechnica-Series Electrical Engineering, (in Press), 1996.
2
O. Dobán and A. Pataricza.

Uml and cost based system planning (in hungarian).
Hungarian Telecommunications, 11(4):36-39, April 2000.
3
W. Hohl, E. Michel, and A. Pataricza.

Hardware support for error detection in multiprocessor systems - a case study.
Microprocessors and Microsystems, 17(4):201-206, 1993.
4
I. Horváth, A. Pataricza, and E. Selényi.

Field service for intelligent measuring equipment.
Periodica Polytechnica- Series Electrical Engineering, 28(1):29-41, 1984.
5
I. Hunyady, A. Jobbágy, A. Pataricza, and E. Selényi.

A PC-based workstation for final calibration and checking.
Hungarian Electronics (Magyar elektronika), V(4):12-16, 1988.
.
6
I. Majzik, W. Hohl, A. Pataricza, M. Dal Cin, J. Hönig, and V. Sieh.

Multiprocessor checking using watchdog processors.
Journal of Computer Systems - Science and Engineering, 11(5):123-135, 1996.
7
I. Majzik and A. Pataricza.

Control flow checking in multitasking systems.
Periodica Polytechnica-Series Electrical Engineering, 39(1):27-36, 1995.
8
A. Pataricza.

Some properties of the signature analysis.
Newsletter of the Technical University of Budapest, 4(1):27-31, 1986.
9
A. Pataricza.

Testing of microprocessors.
Periodica Polytechnica- Series Electrical Engineering, 31(1-2):35-44, 1987.
10
A. Pataricza and B. Benyó.

Fault injection based dependability analysis.
Periodica Polytechnica- Series Electrical Engineering, 37(2):97-109, 1993.
11
A. Pataricza and E. Selényi.

Error-detecting codes in hardware testing.
Journal on Communications, XLV:30-37, Mar. 1994.
12
A. Pataricza, E. Selényi, and A. Szegi.

Automatic testing of microprocessor system unit boards.
Periodica Polytechnica- Series Electrical Engineering, 27(3/4):377- 384, 1983.
13
A. Pataricza, E. Selényi, and A. Szegi.

Development- and testing technology of the MMT application system.
MMT News, 2(1):25-33, 1987.
.
14
A. Petri, P. Urbán, J. Altmann, M. Dal Cin, E. Selényi, K. Tilly, and A. Pataricza.

Constraint based diagnosis algorithms for multiprocessors.
Periodica Polytechnica-Series Electrical Engineering, 40(1):39-52, 1996.
 
 


Conference papers:

1
J. Altmann, T. Bartha, and A. Pataricza.

On integrating error detection into a fault diagnosis algorithm for massively parallel multiprocessors.
In IEEE Computer Performance and Dependability Symposium, IPDS'95, pages 154-164, 1995.
2
J. Altmann, A. Pataricza, T. Bartha, P. Urbán, and A. Petri.

Constraint based system-level diagnosis of multiprocessors.
In A. Hlawiczka and L. Silva, João Gabriel ans Simoncini, editors, Dependable Computing- EDCC-2, The Second European Dependable Computing Conference, volume 1150 of Lecture Notes in Computer Science, pages 403-420, Berlin, Heidelberg etc, Oct. 1996. Springer.
3
T. Bartha and A. Pataricza.

A distributed algorithm for system level diagnosis.
In XIV Scientific Colloquium of the College Kálmán Kandó, 1994.
4
B. Benyó, A. Pataricza, and R. Vemuri.

High fault coverage behavioral test generation.
In Proceedings of the TEMPUS workshop of CAD Methods in Electronic and Information Processing System Design and its Education (JEP3815), June 1995.
5
B. Benyó, A. Pataricza, and R. Vemuri.

High fault coverage behavioral test generation.
In ETW'96 IEEE European Test Workshop, pages 181-186, June 1996.
Montpellier.
6
A. Bondavalli, M. Dal Cin, D. Latella, and A. Pataricza.

High-level integrated design environment for dependability (hide).
In Proceedings of the IEEE Fifth International Workshop on Object-Oriented Real-time Dependable Systems (Words), volume PR00616, pages 87-92. IEEE Computer Society, 2000.
7
G. Csertán, J. Güthoff, A. Pataricza, and R. Thebis.

Modeling of fault-tolerant computing systems.
In 8th Symposium on Microcomputer and Microprocessor Applications, pages 95-104, 1994.
8
G. Csertán, I. Majzik, A. Pataricza, and S. C. Allmaier.

Hardware accelerators for petri-net analysis.
In Proceedings of DAPSYS'98, the Austrian-Hungarian Workshop on Distributed and Parallel Systems, 1998.
9
G. Csertán, I. Majzik, A. Pataricza, and S. C. Allmaier.

Reachability analysis of petri-nets by fpga based accelerators.
In Andrzej Hlawicka, editor, Proceedings of DDECS98, Design and Diagnostics of Electronic Circuits and Systems Workshop, pages 307-312, Szczyrk, Poland, 1998.
10
G. Csertán and A. Pataricza.

On diagnosability in hw-sw codesign: A case study.
In D. Avresky and B. Horst, editors, Digest of Abstracts of the IEEE International Workshop on Embedded Fault-Tolerant Systems, Dallas, Texas, Sept. 1996.
11
G. Csertán, A. Pataricza, and E. Selényi.

Dependability analysis in HW-SW co-design.
In IEEE Computer Performance and Dependability Symposium, IPDS'95, pages 306-315, 1995.
12
M. Dal Cin, W. Hohl, A. Grygier, H. Hessenauer, U. Hildebrandt, J. Hönig, F. Hofmann, C.-U. Linster, E. Michel, A. Pataricza, T. Thiel, and S. Turowski.

Architecture and realization of the modular expandable multiprocessor system memsy.
In Proc. MPCS'94, Conference on Massively Parallel Computing Systems, May 1994.
Ischia, (Best Paper Award).
13
M. Dal Cin, W. Hohl, E. Michel, and A. Pataricza.

Error detection mechanism for massively parallel multiprocessors.
In EUROMICRO Workshop on Parallel and Distributed Processing, IEEE log. No. 1066-6192/92, pages 401-408, Jan. 1993.
Gran Canaria.
14
M. Dal Cin, J. Hönig, W. Hohl, and A. Pataricza.

MEMSY: A modular expandable multiprocessor system with fault tolerance.
In Parallel Systems Fair of IPPS'94, 8th Int. Parallel Processing Symposium, pages 21-28. IEEE Comp. Soc. TC Parallel Processing, 1994.
Cancun, Mexico,.
15
M. Dal Cin and A. Pataricza.

Increasing dependability in multiprocessors.
In 8th Symposium on Microcomputer and Microprocessor Applications, 1994.
16
O. Dobán and A. Pataricza.

Cost estimation driven software project management in UML.
In Elena Gramatová, Hans Manhaeve, and Adam Pawlak, editors, Proceedings of design and diagnostics of electronic circuits and systems workshop, page 34. Institute of Informatics, Slovak Academy of Science, 2000.
17
Z. Hegedüs and A. Pataricza.

Unified description and implementation of deterministic test pattern generation algorithms.
In Proc. CCC'93, The Fourth Mideuropean Conference of Custom Application Specific Integrated Circuits, pages 123-129, May 1993.
Budapest.
18
W. Hohl, E. Michel, and A. Pataricza.

Hardware support for error detection in multiprocessor systems - a case study.
In 7th Symposium on Microcomputer and Microprocessor Applications, 1992.
19
Z. Hornák and A. Pataricza.

Protection against malicious programmer's fault.
In Proc. HiSEC'96 Conference, pages 90-99, June 1996.
20
J. Jávorszky, G. Csertán, and A. Pataricza.

Fault modelling in computer systems.
In Proceedings of DDECS98, Design and Diagnostics of Electronic Circuits and Systems Workshop, 1998.
21
A. Jobbágy and A. Pataricza.

Service equipment and technology in the MMT system.
In Proc. MMT Application Conference, pages 151-155. MMTE, 1984.
22
A. Jobbágy, A. Pataricza, and E. Selényi.

Self-test and field maintenance system for microprocessor controlled instruments.
In Preprints of the Xth IMEKO World Congress, volume 5, pages 69-77, 1985.
Praha.
23
A. Jobbágy, A. Pataricza, and E. Selényi.

Service and maintenance for microprocessor application system: Problems and solutions.
In Proc. ATE'85 Conference, pages 3.5.1-3.5.16, 1985.
Wiesbaden.
24
A. Jobbágy, A. Pataricza, and E. Selényi.

Service system for microprocessor-based devices: The extension of the self-test.
In Proc. FTSD-9, 9th Int. Conference on Fault-Tolerant Systems and Diagnostics, pages 293-298, 1986.
Brno.
25
A. Jobbágy, A. Pataricza, and E. Selényi.

Computer aided quality control system for microprocessor based biomedical instrumentation.
In D. Hoffmann, editor, Proc. CAQ'88, Computer Aided Quality Assurance Conference, pages 254-260, 1988.
Leipzig.
26
A. Jobbágy, A. Pataricza, and E. Selényi.

Final test and calibration system for intelligent measuring equipment.
In VII. Electronic Measurement Equipment and Measuring Technology Conference, pages 36-42, 1988.
Gyor.
27
A. Jobbágy, A. Pataricza, and E. Selényi.

Quality control system for biomedical instrumentation.
In Proc. IEEE Engineering in Medicine & Biology Society, 10th Annual International Conference, Nov. 1988.
Dallas.
28
E. Kiss, A. Pataricza, E. Selényi, and A. Szegi.

Production test, final test and maintenance system of microprocessor controlled equipment.
In Proc. MIMI'80, 6th Int. Symposium for Mini and Microcomputers and their Application, pages 255-259, 1980.
29
I. Majzik, J. Jávorszky, A. Pataricza, and E. Selényi.

Concurrent error detection of program execution based on statechart specification.
In P. Puschner, editor, Proc. EWDC-10, the 10th European Workshop on Dependable Computing, volume 125 of Schriftenreihe der Österreichischen Computer Gesellschaft, pages 181-185, May 1999.
30
I. Majzik and A. Pataricza.

Hierarchical checking of multiprocessors using watchdog processors.
In K. Echtle, D. Hammer, and D. Powell, editors, Proc. Dependable Computing - EDCC-1, First European Dependable Computing Conference, volume 852 of LNCS, pages 386-403. Springer, Berlin etc., Oct. 1993.
31
I. Majzik and A. Pataricza.

Checking of multiprocessors by watchdog processors.
In XIV. Scientific Colloquium of the College Kálmán Kandó, 1994.
32
I. Majzik and A. Pataricza.

Concurrent chcking of multiprocessor systems using watchdog processors.
In Proc. of the 1994 Mini-Symposium, pages 3-4. Dept. of Measurement and Instrument Engineering, Technical University of Budapest, 1994.
33
I. Majzik and A. Pataricza.

A concept for checking communicating sequential processes.
In Proc. of the 1995 Mini-Symposium, pages 7-8. Dept. of Measurement and Instrument Engineering, Technical University of Budapest, 1995.
34
I. Majzik, A. Pataricza, W. Hohl, J. Hönig, and V. Sieh.

A high speed watchdog processor for multitasking systems.
In 8th Symposium on Microcomputer and Microprocessor Applications, 1994.
35
A. Pataricza.

Improved multi-input signature analyzer structures for burst error detection.
In 5th Symposium on Microcomputer and Microprocessor Applications, pages 301-314, 1987.
Budapest.
36
A. Pataricza.

An improved signature analysis based CPU self-test.
In EUROMICRO'87, 13th Symposium on Microprocessing and Microprogramming,Portsmouth, 1987., volume 23 of Microprocessing and Microprogramming, The Euromicro Journal, pages 167-172, 1987.
37
A. Pataricza.

An optimal input-transformation based signature analyzer structure for multi-output circuits.
In Proc. FTSD-11, 11th Int. Conference on Fault-Tolerant Systems and Diagnostics, pages 240-245, 1988.
Suhl.
38
A. Pataricza.

Signature analysis of multiple 3-state lines.
In EUROMICRO'88, 14th Symposium on Microprocessing and Microprogramming,Portsmouth, 1987., 1988.
39
A. Pataricza.

Information-Kompressionmethoden in Digitaltests (Tutorial).
In 24. Fachkolloquium Informationstechnik, pages 145-146. Technische Universität Dresden, Feb. 1991.
40
A. Pataricza.

Remarks on the use of Reed-Solomon codes in signature analysis .
In EUROMICRO'91, 17th Symposium on Microprocessing and Microprogramming, 1991.
Wien.
41
A. Pataricza.

Algebraic modelling of diagnostic problems in hw-sw codesign.
In D. Avresky and B. Horst, editors, Digest of Abstracts of the IEEE International Workshop on Embedded Fault-Tolerant Systems, Dallas, Texas, Sept. 1996.
42
A. Pataricza.

Algebraische Modellierung von Diagnoseproblemen.
In M. Dal Cin, E. Jessen, and E. Schmitter, editors, Fachgespräch Modellierung und Bewertung paralleler Systeme, number 2/96 in Internal Report. Institut für Mathematische Maschinen und Datenverarbeitung, Mar. 1996.
43
A. Pataricza.

SMI support in microelectronics-EEMCN.
EMP-C'96 European Microelectronic Partners Conference, 1996.
Vienna.
44
A. Pataricza.

Termelésirányítás korszerü IT eszközökkel.
In J. Temesi, editor, 50 éves a Budapesti Közgazdaságtudománzi Egyetem, Jubileumi Ülésszak, volume 2, pages 1348-1355, 1998.
45
A. Pataricza and B. Benyó.

Fault injection based dependability analysis.
TEMPUS JEP 3815-92 Technical Workshop, 1993.
46
A. Pataricza, I. Majzik, W. Hohl, and J. Hönig.

Watchdog processors in parallel systems.
In EUROMICRO'93, 19th Symposium on Microprocessing and Microprogramming, volume 39 of Microprocessing and Microprogramming,The Euromicro Journal, pages 69-74, 1993.
Barcelona.
47
A. Pataricza, T. Sipos, and J. Sziray.

An artificial intelligence application in fault-oriented algorithms.
In 6th Symposium on Microcomputer and Microprocessor Applications, pages 147-155, 1989.
Budapest.
48
A. Pataricza, T. Sipos, and J. Sziray.

A path-ordering principle for test calculation algorithms.
In FTSD-13, 13th Intl. Conf. on Fault-Tolerant Systems and Diagnostics, 1990.
49
A. Pataricza, K. Tilly, E. Selényi, and M. Dal Cin.

Constraint based system-level diagnosis of multiprocessor archiectures.
In 8th Symposium on Microcomputer and Microprocessor Applications, 1994.
50
G. Péceli, J. Máthé, and A. Pataricza.

Measurements in embedded systems.
In EMTECH'99 Proceedings of the 1999 IEEE International Workshop on Emerging Technologies, pages 41-45. IEEE, 1999.
51
A. Petri and A. Pataricza.

Application of statistical methods for enhancing automatic test pattern generation.
In Proceedings of the EWDC-9 conference, pages 182-185, May 1998.
52
A. Petri, A. Pataricza, and E. Selényi.

Behavioural vhdl description based synthesis of self-checking circuits.
In P. Puschner, editor, Proc. EWDC-10, the 10th European Workshop on Dependable Computing, volume 125 of Schriftenreihe der Österreichischen Computer Gesellschaft, pages 135-139, Vienna, Austria, May 1999.
53
B. Sallay, A. Petri, K. Tilly, and A. Pataricza.

High level test pattern generation for VHDL circuits.
In ETW'96 IEEE European Test Workshop, pages 202-206, June 1996.
54
E. Selényi and A. Pataricza.

Problems and methods of self-checking.
In Proc. From Theory to Prototype Workshop, 1991.
Budapest.
55
V. Sieh, A. Pataricza, B. Sallay, W. Hohl, J. Hönig, and B. Benyó.

Fault injection based validation of fault-tolerant multiprocessors.
In 8th Symposium on Microcomputer and Microprocessor Applications, 1994.
56
K. Tilly, A. Pataricza, and B. Sallay.

High level functional test generation based on constraint satisfaction and heuristic cost functions.
In Second Workshop on Hierarchical Test Generation, volume SI-14, pages 19-20. Gerhard Mercator Univ. Duisburg, 1995.
ISSN 0942-4164.
57
D. Varró, G. Varró, and A. Pataricza.

Automatic graph transformation in system verification.
In Elena Gramatová, Hans Manhaeve, and Adam Pawlak, editors, Proceedings of design and diagnostics of electronic circuits and systems workshop, page 34. Institute of Informatics, Slovak Academy of Science, 2000.
58
D. Varró, G. Varró, and A. Pataricza.

Designing the automatic transformation of visual languages.
In H. Ehrig and G. Taentzer, editors, GRATRA 2000 Joint APPLIGRAPH and GETGRATS Workshop on Graph Transformation Systems, pages 14-21. Technical University of Berlin, Germany, March 2000.
 
 


Thesis:

1
András Pataricza.

Signature Analysers of a Maximal Fault Detection Capability.
PhD thesis, Hungarian Academy of Sciences, Sept. 1988.
.
 
 


Technical reports:

1
Technical report.
2
Technical report.
3
A. Borschet, M. Dal Cin, J. Jávorszky, A. Pataricza, G. Savoia, and C. Szász.

Specification of the HIDE environment.
Technical Report HIDE/D3/TUB/1/v2, 1999.
4
G. Csertán, M. Dal Cin, G. Huszerl, J. Jávorszky, K. Kosmidis, A. Pataricza, and C. Szász.

The demonstrator.
Technical Report HIDE/D5/TUB/1/v2, 1999.
5
G. Farkas, G. Gruber, L. Gyimesi, J. Hainzmann, T. Héray, L. Jereb, I. Majzik, A. Pataricza, and L. Szandi.

Reliability analysis of the E25 pump controller electronics.
Technical report, BME, 1997.
6
W. Hohl, E. Michel, and A. Pataricza.

Hardware support for error detection in multiprocessor systems - a case study.
Technical Report 6/91, Friedrich-Alexander Univ. Erlangen-Nürnberg, IMMD3, 1991.
7
I. Majzik, G. Csertán, A. Pataricza, and S. C. Allmaier.

Support of formal verification by fpga based accelerators.
Technical Report 5/97, Institute of Computer Science III, University of Erlangen-Nuremberg, 1997.
8
I. Majzik and A. Pataricza.

CAN and TTP - protocols for embedded distributed real time systems.
Technical report, BME, 2000.
9
Z. Országh, G. Román, G. Csertán, and A. Pataricza.

UML based optimal production scheduling.
Technical report, Department of Measurement and Information Systems of the Technical University of Budapest, 1998.
10
A. Pataricza.

A testing concept for the MEMSY computing nodes.
Technical Report 6/91, Friedrich-Alexander Univ. Erlangen-Nürnberg, IMMD3, 1991.
11
A. Pataricza, I. Majzik, and G. Csertán.

Formális módszerek az informatikában.
12
A. Pataricza, I. Majzik, G. Csertán, B. Benyó, A. Petri, and B. Sallay.

Checking of ultra-reliable controllers.
Technical report, Technical University of Budapest, Dept. Measurement and Information Systems, 1997.
13
A. Pataricza, I. Majzik, G. Csertán, G. Huszerl, J. Jávorszky, and C. Szász.

HIDE- high level design environment for dependability.
Technical report, OMFB, 1999.
14
A. Pataricza, K. Tilly, E. Selényi, and M. Dal Cin.

A constraint based approach to system level diagnosis.
Technical Report 4/94, Friedrich-Alexander Univ. Erlangen-Nürnberg, IMMD3, 1994.
15
A. Pataricza and P. Urbán.

A combination of petri-nets and linear programming in design for dependability.
Technical report, TUB, 1998.
16
T. Polner, A. Pataricza, and T. Zsemlye.

Információs rendszerek biztonságtechnikája és UML modellezése.
jegyzet, 1998.
17
B. Sallay, B. Benyó, Z. Hegedüs, A. Pataricza, A. Petri, J. Sziray, and K. Tilly.

A proposed VHDL subset for test generation purposes.
Technical Report FUTEG-1/1994, PECO 9624 Project, 1994.
18
B. Sallay, K. Tilly, A. Pataricza, G. Csertán, Z. Hegedüs, A. Petri, L. Surján, and J. Sziray.

Application of AI methods in high level test generation.
Technical Report FUTEG-3/1995, PECO 9624 Project, 1995.
19
B. Sallay, K. Tilly, A. Pataricza, Z. Hegedüs, A. P. jr., L. Surján, and J. Sziray.

An artificial intelligence based approach to vhdl level test generation.
Technical Report FUTEG-2/1994, PECO 9624 Project, 1994.
20
I. Turcsányi, G. Csertán, and A. Pataricza.

Model-based diagnostic test scheduling.
In Technical Conference on CAD Methods in Electronic and Information Processing Education, pages 27-30. TUB, 1995.
 
 


Tutorials:

1
N. Fuchs, T. DeMarco, A. Pataricza, L. Suchman, and N. Wirth.

Panel discussion: Software engineering and software quality ten years from now, jan 1997.
2
A. Pataricza.

Signature analysis (Tutorial).
In 4th Symposium on Microcomputer and Microprocessor Applications, pages 113-118, 1984.
Gyöngyös.
3
A. Pataricza.

Cache Probleme in Multiprozessorsystemen.
Universität Hannover, June 1993.
4
A. Pataricza.

Hardwarenahe Fehlererkennungsverfahren für fehlertolerante Mikrorechner.
Informatik-Kolloquium der FAU Erlangen-Nurnberg, May 1993.
5
A. Pataricza.

Hardware software co-design of dependable systems.
EECS 298-11: CAD Seminar University of Berkeley, September 1996.
6
A. Pataricza.

The perfectly designed chaos - or how can we stop the amok run of an imperfect software on a faulty hardware.
Managing Software Quality-Engineering Success Conference, Infogem AG, Swiss Association for the Promotion of Quality, SAQ, jan 1997.
7
A. Pataricza.

Qualitative evaluation of dependability characteristics by means of operation research methods.
Dagstuhl Seminar No. 00131, Validation of Dependable Behavior of Safety- and Mission-Critical Computing Systems, April 2000.
 
 


Lecture notes:

1
A. Pataricza, I. Majzik, G. Csertán, and T. Bartha.

Formal methods in the information technology.
electronic lecture note.
2
A. Pataricza, I. Majzik, G. Csertán, T. Bartha, and A. Petri.

Fault tolerant computing.
Electronic lecture note.